• CLeVer

    Verification of Hardware Concurrency via Model Learning Funded by EPSRC - Engineering and Physical Sciences Research Council

  • CLeVer

    Verification of Hardware Concurrency via Model Learning Funded by EPSRC - Engineering and Physical Sciences Research Council

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What is the goal of CLeVer?

The overall goal of this project is to develop a verification framework for hardware systems that uses artificial intelligence to automatically build and verify better models.

The novel idea behind this project is to rely on the model learning paradigm, originally proposed in AI, to automatically build a model of a running system in a black-box fashion—from a series of observations of the behaviour of the system.

In recent years model learning has started to be successfully applied in a variety of academic and industrial contexts. However, the models developed using this approach are all inherently sequential. The verification of concurrent behaviour in hardware systems is an unexplored, challenging, and potentially rewarding application that this project proposes to explore.

Latest News

Position available

1 PhD position available on the project!Please send expressions of interest to Alexandra Silva (alexandra.silva@ucl.ac.uk) and Matteo Sammartino (matteo.sammartino@rhul.ac.uk).

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Latest Publications

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